Such integrated circuits are multilayer structures whose key elements are multi-gate transistors, where a source-drain channel („fin“) is surrounded by a 3D gate.
- A failure analysis process of such integrated circuits typically involves delayering and electrical nanoprobing. After the defective area is found a lamella containing the failure of interest can be prepared for TEM inspection.
- So far, delayering has been performed mainly by means of mechanical polishing. However, for future devices mechanical polishing cannot be used due to micro and nano mechanical deformation and chemical interactions with polishing suspension.
- TEM lamella preparation is done on FIB-SEM systems. These lamellae must be artefact-free with the thickness proportional to the technology node.
Failure analysis of integrated circuits typically includes:
- Delayering and electrical probing in technology nodes of last generation
- Preparation of TEM lamella from integrated circuits
- FIB-SEM tomography for 3D structural analysis (3D BSE reconstructions)
- Electrical fault isolation (EBIC, EBAC)
- Low voltage SEM inspection
Any TESCAN FIB-SEM system can be equipped with a GIS for enhancing and optimising a wide range of FIB applications including circuit edit. Two options for GIS configuration are available: a 5-nozzle motorised GIS or multiple MonoGIS units. In either option the following precursors are available: Pt and W for metal deposition, SiOx for insulator deposition, H2O for enhanced etching Cu and XeF2 for selective etching of Si, SiOx, and Si3N4.
- TESCAN LYRA and GAIA FIB-SEM systems are equipped with the DrawBeam lithography module, dedicated, user-friendly and effective software for precise etching, deposition and end-point detection required for advanced circuit editing applications.
- Precise end-point detection is achieved by means of the FIB-SE signal, i.e. secondary electrons emitted during milling which are used to identify transitions between layers. The detection accuracy is better than 20 nm in the Z-direction on ICs.
- In addition, Synopsys AvalonTM (Camelot™) software as a well established CAD navigation standard in combination with the X-Positioner Module allows live overlay of the SEM or FIB image with CAD design data, optical, IR, X-ray, etc. images for precise navigation over the IC for frontside and backside circuit editing.